Senior Design Verification Engineer
Analog DevicesAbout Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.
Senior Design Verification Engineer
About the Role
As a Senior Design Verification Engineer at Analog Devices, you will lead verification planning and execution for complex digital and mixed-signal designs. Working independently with minimal supervision, you'll leverage your expertise to architect advanced verification environments, mentor junior engineers, and drive innovation in verification approaches. You'll provide strategic solutions to diverse technical challenges while representing ADI in technical forums and customer interactions. This career-level position involves collaborating across organizational boundaries to ensure the quality and reliability of our cutting-edge products.
Key Responsibilities
- Lead Verification Strategy: Architect and implement comprehensive verification strategies for complex digital/mixed-signal designs
- Environment Development: Drive innovation in UVM-based verification environment development for sophisticated mixed-signal products
- Coverage and Metrics: Establish and oversee verification metrics including code and functional coverage goals across multiple projects
- Debug Leadership: Lead debug efforts for complex design issues spanning digital and mixed-signal domains
- Technical Mentorship: Provide technical guidance and mentoring to junior verification engineers
- Cross-Functional Collaboration: Drive effective collaboration with design teams on verification planning and issue resolution
- Post-Silicon Support: Lead silicon bring-up efforts and post-silicon validation activities
- Methodology Advancement: Contribute to verification methodology improvements and best practices development
Must Have Skills
- SystemVerilog and UVM: Expert-level know
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